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Topic choices for Digital Logic are shortened. Search still covers every problem.

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ProblemCourse & topicStatus

DLOG:9918201Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918202Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918203Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918204Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918205Design two overlapping serial detectors for the bit pattern 0110 (leftmost bit first), both reset to an…

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918206Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918207Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918208A datapath has registers A and B, a subtractor, a swap path, and two combinational predicates Z (true if and only…

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918209A fully specified synchronous Moore machine has the table…

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

—

DLOG:9918210Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918211Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918212Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918213Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918214Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918215Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918216Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918217Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918218Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918219Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918220Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918221Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918222Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918223Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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DLOG:9918224Mathematical problem title

DatapathDigital Logic Problem Solving

Arithmetic units and datapath compositionDigital Logic · Calculation

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Showing 24 of 50 matching problems.

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A synchronous Moore machine with reset state

A

has the table…

Two synchronous Moore machines have reset states

A

and

P

respectively…

A synchronous Moore handshake controller has states

\mathrm{IDLE}

,

\mathrm{LOAD}

,

\mathrm{WAIT}

, and

\mathrm{ACKED}

…

A synchronous Moore process controller has states

\mathrm{IDLE}

,

\mathrm{LOAD}

,

\mathrm{BUSY}

, and

\mathrm{FIN}

…

An incompletely specified synchronous Moore machine has reset state

A

and the table…

A synchronous Mealy machine with two outputs

z_1,z_2

is to detect, in overlapping fashion, the serial pattern 101…

A synchronous sequential circuit with inputs

x_1x_0

, present-state bits

Q_1Q_0

, and Moore output

z

is…

A combinational mapping is stored in a ROM whose address n is an unsigned 5-bit integer,

0\le

n\le

31.

A

16\times

2 ROM implements two Boolean functions of inputs W,X,Y,Z, with address bits WXYZ and W the most…

A

16\times 4

ROM converts a 4-bit unsigned binary input

B_3B_2B_1B_0

into 4-bit binary-reflected Gray code…

Four

256\times

4 ROM chips

U_0,U_1,U_2,U_3

are used to build one

512\times

8 ROM.

An SRAM of organization

4\mathrm{K}\times

8 is to be built from

1\mathrm{K}\times

4 SRAM chips.

A

256\mathrm{K}\times

4 DRAM uses a multiplexed address bus of 9 pins

\mathrm{AD}_8\ldots\mathrm{AD}_0

, together…

Eight

4\mathrm{K}\times

8 SRAM chips are used to build a

16\mathrm{K}\times

16 memory.

A byte-addressable processor has a 16-bit address

A_{15}\ldots

A_0

and an 8-bit data bus.

A processor is byte-addressable, has a 20-bit byte address

A_{19}\ldots

A_0

, and has a 32-bit data bus.

An

8\mathrm{K}\times

8 memory is organized as four banks of

2\mathrm{K}\times

8.

A 3-to-8 decoder has active-low outputs

\overline{Y}_0,\ldots,\overline{Y}_7

, an active-high enable

G_1

, and two…

A

2\mathrm{K}\times

8 SRAM has address pins

a_{10}\ldots

a_0

tied to system address bits

A_{10}\ldots

A_0

.

A

16

-bit address space contains three devices with the following active-high chip selects…

A PLA with three inputs

A,B,C

, three product terms

P_1,P_2,P_3

, and three outputs

F,G,H

is to realize…