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ProblemsClear skill: Interrupts Concurrency Build a practice set

ProblemCourse & topicStatus

EMB:9925051Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925052Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925053Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925054Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925055Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925056A DMA channel is programmed in circular 16-bit mode to service an ADC.

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925057External interrupt line 4 is to fire on the falling edge of PC4, with the rising edge ignored, and with the line…

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925058Timer TIM4 exposes three 32-bit registers with distinct write semantics.

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925059A Cortex-M3 bit-band region maps each bit of a 1 MiB address window onto a 32-bit word in a 32 MiB alias window.

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925060Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925061A 32-bit little-endian Cortex-M microcontroller stores exception vectors as 32-bit entries in a table whose base…

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925062Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925063An NVIC implements only the four most significant bits of each 8-bit IRQ priority field: bits [7:4] are writable…

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925064A Cortex-M3 without an FPU is executing Thread mode from the main stack.

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925065A Cortex-M3 interrupt controller is modeled by the following cycle-accurate rules on a processor clock of…

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925066A Cortex-M3 uses this cycle-accurate entry model.

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925067Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925068A single-core NVIC preempts strictly by preemption-priority field (numerically smaller is more urgent).

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925069A Cortex-M3 provides three software masks, with the following declared semantics (use only these rules, not a…

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925070Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925071Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925072Mathematical problem title

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925073An 8-byte insertion buffer is shared by Thread mode and by a single IRQ.

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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EMB:9925074A UART receiver deposits one byte per RXNE interrupt into a circular buffer of N=8 slots with 8-bit indices…

Interrupts ConcurrencyEmbedded Systems Problem Solving

Interrupts, concurrency, and shared stateEmbedded Systems · Calculation

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USART2 is clocked by

f_{\mathrm{CK}}=36.00\,\mathrm{MHz}

.

SPI1 is a master on APB2 with

f_{\mathrm{PCLK2}}=84.00\,\mathrm{MHz}

.

An I2C kernel is clocked at

f_{\mathrm{I2CCLK}}=48.00\,\mathrm{MHz}

.

A Cortex-M NVIC implements 4 implemented priority bits, occupying bits [7:4] of each 8-bit

\mathtt{IPR}

field…

The SysTick timer is a 24-bit down-counter with registers

\mathtt{CTRL}

,

\mathtt{LOAD}

, and

\mathtt{VAL}

.

An independent watchdog is clocked by an internal RC oscillator

f_{\mathrm{LSI}}=40.00\,\mathrm{kHz}

.

The Nested Vectored Interrupt Controller (NVIC) of a Cortex-M3 is memory-mapped as follows (all registers are

32

…

A Cortex-M3 runs from a

64.000\,\mathrm{MHz}

processor clock.

A microcontroller clocked at

80.000\,\mathrm{MHz}

services a periodic timer IRQ.

A

72.000\,\mathrm{MHz}

Cortex-M3 uses a timer IRQ whose hardware period is exactly

T=100.000\,\mu\mathrm{s}

.

A 32-bit microcontroller maintains a 64-bit software tick as two 32-bit variables

\mathrm{tick\_lo}

and…