Two otherwise identical n-channel common-source stages are biased at the same…

Two otherwise identical n-channel common-source stages are biased at the same saturation Q-point \(I_{DQ}=0.400\,\mathrm{mA}\) with \(g_m=2.00\,\mathrm{mS}\), \(r_o=\infty\), and \(g_{mb}=0\). In both circuits the drain resistor is \(R_D=10.0\,\mathrm{k}\Omega\), the load \(R_L=10.0\,\mathrm{k}\Omega\) is capacitively coupled from drain to AC ground, and the gate is driven by an ideal voltage source \(v_g\) (zero source resistance). Capacitances are omitted. Body is tied to source in both circuits. Circuit A places the source at AC ground. Circuit B inserts an unbypassed source resistor \(R_S=800\,\Omega\) from source to AC ground. Define \(v_{gs}\) as the gate-to-source incremental voltage and \(v_o\) as the drain incremental voltage. Determine (a) \(A_{v,A}=v_o/v_g\) for Circuit A, (b) \(A_{v,B}\), the ratio \(v_{gs}/v_g\), and the ratio \(v_{s,\mathrm{term}}/v_g\) for Circuit B, where \(v_{s,\mathrm{term}}\) is the source-terminal incremental voltage, and (c) the effective transconductance \(G_{m,\mathrm{eff}}=i_d/v_g\) of each circuit, where \(i_d\) is the incremental drain current leaving the drain into the MOSFET. Then (d) interpret, using only these midband linear models, why \(|A_{v,B}|\) is smaller than \(|A_{v,A}|\) at the same \(g_m\), and state what local quantity at the gate-source port is reduced by degeneration. Do not invoke frequency response or noise.

The two circuits share \(g_m\) and \(R_D\parallel R_L\); they differ only in whether \(v_{gs}\) equals \(v_g\).