A D latch has enable C and data D

A D latch has enable \(C\) and data \(D\). When \(C=1\), a change in \(D\) propagates to \(Q\) with delay \(t_{pd,DQ}=1.60\,\mathrm{ns}\). A rising edge of \(C\), with \(D\) already stable, drives \(Q\) to \(D\) with delay \(t_{pd,CQ}=2.20\,\mathrm{ns}\). When \(C=0\) the output is frozen and later changes of \(D\) do not affect \(Q\). Contamination and propagation delays are taken equal (no min/max split). \(Q\) changes only in response to the two mechanisms above. Initially \(C=0\), \(D=0\), and \(Q=0\). On \(0\le t\le 30\,\mathrm{ns}\) the inputs are \[ C=1\text{ on }5.00\le t<14.00\,\mathrm{ns}\text{ and on }18.00\le t<27.00\,\mathrm{ns},\quad C=0\text{ otherwise}; \] \[ D=1\text{ on }3.00\le t<9.00\,\mathrm{ns},\;0\text{ on }9.00\le t<16.50\,\mathrm{ns},\;1\text{ on }16.50\le t<21.00\,\mathrm{ns},\;0\text{ on }t\ge 21.00\,\mathrm{ns}. \] Determine (a) every output transition of \(Q\), giving the time, the \(0\to 1\) or \(1\to 0\) direction, and which delay path (D-to-Q or C-to-Q) produced it, (b) \(Q\) at \(t=4.00,6.00,8.00,10.50,13.00,17.00,19.50,22.50\), and \(28.00\,\mathrm{ns}\), (c) whether the falling edge of \(C\) at \(t=14.00\,\mathrm{ns}\) stores \(0\) or \(1\), and whether the falling edge at \(t=27.00\,\mathrm{ns}\) stores \(0\) or \(1\), and (d) the length of the interval after \(t=9.00\,\mathrm{ns}\) during which \(Q\) still equals \(1\) even though \(D\) has already returned to \(0\).

There are two, and only two, ways \(Q\) can move: a rising \(C\) (delay \(t_{pd,CQ}\)) or a \(D\) change while \(C=1\) (delay \(t_{pd,DQ}\)).