A single fully preemptive uniprocessor hosts three independent implicit-deadline…

A single fully preemptive uniprocessor hosts three independent implicit-deadline periodic tasks whose WCETs are obtained from a cycle-accurate basic-block sum, then used in RM and EDF tests. Core clock \(f=80.0\,\mathrm{MHz}\). Zero jitter, zero blocking, zero RTOS overhead beyond what is already folded into the cycle counts. Cycle WCETs: \[ \begin{array}{c|ccc} \text{task} & \tau_1 & \tau_2 & \tau_3\\ \hline \text{cycles }E_i & 80000 & 160000 & 160000\\ T_i\ (\mathrm{ms}) & 4.00 & 6.00 & 9.00 \end{array} \] Convert by \(C_i=E_i/f\). RM priorities by period. EDF by absolute deadline. RM response times use \[ R_i^{(0)}=C_i,\qquad R_i^{(k+1)}=C_i+\sum_{h\in hp(i)}\Bigl\lceil\frac{R_i^{(k)}}{T_h}\Bigr\rceil C_h \] with a pass only if the least fixed point satisfies \(R_i\le T_i\). (a) Compute each \(C_i\) in microseconds and in milliseconds. Compute \(U=\sum C_i/T_i\) as an exact rational (use fractions of a millisecond) and to four decimal places. (b) Decide the EDF test \(U\le 1\) and the RM sufficient test \(U\le U_{\mathrm{lub}}(3)\) with \(U_{\mathrm{lub}}(3)=3(2^{1/3}-1)\) to four decimal places. (c) Compute RM response-time iterates in milliseconds for every task and decide every RM deadline. (d) A late change increases \(E_3\) to \(280000\) cycles (for example a longer filter). Recompute \(C_3\) and \(U\). Redecide EDF. Recompute RM iterates of \(\tau_3\) and decide \(D_3=9.00\,\mathrm{ms}\). State which scheduler, if either, still meets every deadline under the declared model, and state that the conclusion is a uniprocessor task-level result, not a certification of a particular MCU silicon or compiler.

Convert cycle WCETs at \(80.0\,\mathrm{MHz}\) before any utilization or response-time test.